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/// ONLINE WEEKLY Amiga Report Online                The lines are buzzing!

From the Amiga_Tech echo on Fidonet

Date: 26 Jun 93  12:24:00
From: Skipper Smith
  To: Jussi Alan{r{
Subj: Re: 68030 MMU
JA> Steve, I have a friend with an EC030 that also says it has an MMU.
JA> Enforcer runs with no problems.  After talking to a friend who works
JA> at Motorola, they said that when they are testing chips and the
JA> Instruction unit passes but the MMU Fails, the MMU is completly
JA> disabled and the chip is marked EC.

I would like to know who your friend is.  This is NOT how Motorola does
business and it is NOT how the 68EC030's come into being.  Processors that
are destined to be MC68EC030's are taken off the assembly line for the
68030 after masking the final layer and are routed to another area where
their MMUDIS pins are tied to ground.  After that point, only absolutely
minimal testing is performed on the MMU portion of the chip to make sure
that the TTC's (transparent translation registers) are functioning and
that there are no grevious masking problems that could affect the rest of
the chips operation.  No processor under the EC or LC mark has failed ANY
tests (and, in fact, the vast majority of them would probably pass the
More [50%]? -Y/n/c- c
full MMU test if it was done).  The reason for this is because tester time
is VERY expensive and every chip has to be tested.  By having a version of
the chip that doesn't need as much time on the tester it can be sold for
less money (there are other reasons why the EC is cheaper but I won't go
into those here).

JA> OTOH, when they have a bunch of full blown 68030s and a customer orders
JA> 500 EC 030s and they only have 350 or so laying around, they label 150
JA> of the good parts EC and ship them.  Since EC units are supposed to go
JA> to embedded controllers, the added MMU would just be ignored by
JA> whatever piece of hardware it would be put into.

Now this is correct.  The easiest way to identify if you are the fortunate
recipient of a "real" '030 in MC68EC030's clothing is to check out the
package.  If it is ceramic, you have a real '030.  If it is plastic, you
have a 68EC030 (one of those other cost saving measures).

Skipper Smith                        Motorola Technical Training
All opinions are my own and not necessarily those of my employer


Date: Sat 26 Jun 93  8:56
From: Darren Ewaniuk
  To: John Fraser
Subj: Re: 3.0 os on 2000's?
In a message dated 24 Jun 93  09:41:41, John Fraser wrote:

 JF> RE: Re: 3.0 os on 2000's?
 JF> BY: John Fraser to Mike Noreen on Wed Jun 23 1993 13:31:22

 >  > Sorry kid, wrong again. The AGA custom chips are STILL 16-bit. They only

 >  > 32-bit access to chip-ram. That's all.

 JF> How could (and why?) a 16 bit graphics chip(set) have 32 bit access
 JF> to ram? I mean, a 16 bit chip wouldn't benefit from 32 bit ram anyway,
 JF> so why would CBM put it in there?

Alice (like Agnus) has a 16 bit bus.  Lisa (like Denise) has a 32-bit bus. 
Paula is 16 bits, but then she didn't change.

More [42%]? -Y/n/c- c
Lisa controls the graphics display and reads the data from the chip memory in
32-bit-wide 'chunks'.  This gives a two-fold increase in chip memory
bandwidth.  Couple that with the fact that it does these fetches in a 'burst'
mode of two 32-bit chunks at a time, you get a four-fold increase in chip
memory bandwidth.  This is only for the tedious task of drawing the screen
each scanline, every frame.

Memory is 32-bits wide (like the A3000).  So CPU access to the chip memory is
also twice as fast as a 2000.

The blitter and coprocessor (Alice) is still only 16-bit.  This means any
blits will still only be moved 16 bits at a time.  Through a bit of magic
circuitry (actually, it's not too hard) Alice can select which part of a
32-bit longword (lower 16-bits or higher 16-bits) in the chip memory it will
blit to for any given 16-bit word.

So the system does benefit from Lisa and the chip RAM being 32-bits wide. 
Alice doesn't benefit, but it does know how to cope with it at its own